1. Field of the Invention
The disclosed embodiments of the present invention relate to controlling oscillation of a ring oscillator, and more particularly, to an oscillation control circuit for biasing the ring oscillator utilizing a bandgap reference signal, and a control method thereof.
2. Description of the Prior Art
A ring oscillator is used as an intrinsic clock generation source, or as one stage within a more complex system such as a voltage controlled oscillator (VCO) or a phase locked loop (PLL), and may be used to issue a refresh command for a memory device, such as a dynamic random access memory (DRAM) device.
Please refer to FIG. 1, which is a schematic diagram illustrating an exemplary example of a traditional control circuit 100 for a ring oscillator 10. The ring oscillator 10 includes a plurality of inverters IN1-IN5, each having an input terminal and an output terminal coupled in series. The last inverter (i.e. the inverter IN5)'s output terminal OUT5 is coupled back to the first inverter (i.e. the inverter IN1)'s input terminal INP1. The ring oscillator 10 is controlled by the control circuit 100 including a current source 110 and a plurality of current mirrors 120_1˜120_5. The current source 110 includes a p-channel metal-oxide-semiconductor field-effect transistor (MOSFET) P1, a resister R1 and an n-channel transistor N1 coupled in series as shown in FIG. 1, where a gate of the transistor P1 is coupled to a drain of the transistor P1, and a drain of the transistor N1 is coupled to a gate of the transistor N1. The resister R1 is coupled between the drain of the transistor P1 and the drain of the transistor N1. The current source 110 is powered by a voltage difference between a first operating voltage (e.g. a supply voltage) VCC and a second operating voltage (e.g. a ground voltage) VSS. Each of the plurality of current mirrors 120_1˜120_5 includes a p-channel transistor and an n-channel transistor. For example, the current mirror 120_1 includes a p-channel transistor PN1 and an n-channel transistor NN1. A gate of the transistor PN1 is coupled to the gate of the transistor P1, a drain of the transistor PN1 is coupled to the inverter IN1, and a source of the transistor P1 is coupled to the first operating voltage VCC. Similarly, a gate of the transistor NN1 is coupled to the gate of the transistor N1, a drain of the transistor NN1 is coupled to the inverter IN1, and a source of the transistor N1 is coupled to the second operating voltage VSS. The current mirrors 120_1-120_5 are configured in the same fashion. Assuming a voltage value at the drain of the transistor P1 is VP and a voltage value at the drain of the transistor N1 is VN, a current I1 provided by the current source 110 will be (VP−VN)/R1.
As most semiconductor technology fabrications advance from 0.18 microns to a 0.13 microns manufacturing process, the typical operating voltages used to control the transistors to be turned on or off are reduced from 2.5 volts to 1.8 volts. The resulting circuit becomes more sensitive to manufacture and temperature variations. That is, when the first operating voltage VCC drops down, the voltage difference (VP−VN) becomes very small.
If a threshold voltage of a p-channel transistor is lower than normal, the p-channel transistor will have a higher speed. Similarly, if a threshold voltage of an n-channel transistor is higher than normal, the n-channel transistor will have a higher speed. Thus a delay time of the conventional ring oscillator 10 varies according to different temperatures and manufacturing process parameters, even under a condition that the parameters are within set specifications and the operating voltage VCC is regulated.